Regviz

Silicon Labs /Series0 /EFM32TG /EFM32TG232F16 /PRS /CH4_CTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CH4_CTRL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/Series0/EFM32TG/EFM32TG232F16/PRS/CH4_CTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SIGSEL 0 (NONE)SOURCESEL0 (OFF)EDSEL 0 (ASYNC)ASYNC

SOURCESEL=NONE, EDSEL=OFF

Description

Channel Control Register

Fields

SIGSEL

Signal Select
SOURCESEL

Source Select

0 (NONE): No source selected

1 (VCMP): Voltage Comparator

2 (ACMP0): Analog Comparator 0

3 (ACMP1): Analog Comparator 1

6 (DAC0): Digital to Analog Converter 0

8 (ADC0): Analog to Digital Converter 0

16 (USART0): Universal Synchronous/Asynchronous Receiver/Transmitter 0

17 (USART1): Universal Synchronous/Asynchronous Receiver/Transmitter 1

28 (TIMER0): Timer 0

29 (TIMER1): Timer 1

40 (RTC): Real-Time Counter

48 (GPIOL): General purpose Input/Output

49 (GPIOH): General purpose Input/Output

52 (LETIMER0): Low Energy Timer 0

57 (LESENSEL): Low Energy Sensor Interface

58 (LESENSEH): Low Energy Sensor Interface

59 (LESENSED): Low Energy Sensor Interface
EDSEL

Edge Detect Select

0 (OFF): Signal is left as it is

1 (POSEDGE): A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal

2 (NEGEDGE): A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal

3 (BOTHEDGES): A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal
ASYNC

Asynchronous reflex

Links

()

Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data